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1

Enhanced Virtual Prototyping (Featuring RISC-V Case Studies) ||

Herdt, Vladimir, GroÃe, Daniel, Drechsler, Rolf

Year:

2021

File:

PDF, 4.83 MB

2021

2

In-Memory Computing (Synthesis and Optimization) ||

Shirinzadeh, Saeideh, Drechsler, Rolf

Year:

2020

Language:

english

File:

PDF, 2.05 MB

english, 2020

3

RISC-V based Virtual Prototype: An Extensible and Configurable Platform for the System-level

Herdt, Vladimir, GroÃe, Daniel, Pieper, Pascal, Drechsler, Rolf

Journal:

Journal of Systems Architecture

Year:

2020

File:

PDF, 4.65 MB

2020

4

An Energy-aware Model for the Logic Synthesis of Quantum-Dot Cellular Automata

Torres, Frank Sill, Wille, Robert, Niemann, Philipp, Drechsler, Rolf

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2018

Language:

english

File:

PDF, 776 KB

english, 2018

5

Logic Synthesis for RRAM-based In-Memory Computing

Shirinzadeh, Saeideh, Soeken, Mathias, Gaillardon, Pierre-Emmanuel, Drechsler, Rolf

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2017

Language:

english

File:

PDF, 1.36 MB

english, 2017

6

[IEEE 2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID) - Pune (2018.1.6-2018.1.10)] 2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID) - Exact Synthesis of Biomolecular Protocols for Multiple Sample Pathways on Digital Microfluidic Biochips

Keszocze, Oliver, Ibrahim, Mohamed, Wille, Robert, Chakrabarty, Krishnendu, Drechsler, Rolf

Year:

2018

Language:

english

File:

PDF, 447 KB

english, 2018

7

Weighted search – unifying view and application

Rüdiger Ebendt, Rolf Drechsler

Journal:

Artificial Intelligence

Year:

2009

Language:

english

File:

PDF, 583 KB

english, 2009

8

Formal Modeling and Verification of Cyber-Physical Systems || Physical Safety in Robotics

Drechsler, Rolf, Kühne, Ulrich

Year:

2015

Language:

english

File:

PDF, 1021 KB

english, 2015

9

A PLiM Computer for the Internet of Things

Soeken, Mathias, Gaillardon, Pierre-Emmanuel, Shirinzadeh, Saeideh, Drechsler, Rolf, Micheli, Giovanni De

Journal:

Year:

2017

Language:

english

File:

PDF, 683 KB

english, 2017

10

[IEEE 2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL) - Novi Sad, Serbia (2017.5.22-2017.5.24)] 2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL) - Exact Synthesis of Ternary Reversible Functions Using Ternary Toffoli Gates

Kole, Abhoy, Rani, P. Mercy Nesa, Datta, Kamalika, Sengupta, Indranil, Drechsler, Rolf

Year:

2017

Language:

english

File:

PDF, 219 KB

english, 2017

11

[IEEE 2016 Forum on Specification and Design Languages (FDL) - Bremen, Germany (2016.9.14-2016.9.16)] 2016 Forum on Specification and Design Languages (FDL) - On the application of formal fault localization to automated RTL-to-TLM fault correspondence analysis for fast and accurate VP-based error effect simulation - a case study

Herdt, Vladimir, Le, Hoang M., Grobe, Daniel, Drechsler, Rolf

Year:

2016

Language:

english

File:

PDF, 281 KB

english, 2016

12

[IEEE Conference Publications Design Automation and Test in Europe - Dresden, Germany (2014.03.24-2014.03.28)] Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014 - Panel: Future SoC verification methodology: UVM evolution or revolution?

Drechsler, Rolf, Chevallaz, Christophe, Fummi, Franco, Hu, Alan J., Morad, Ronny, Schirrmeister, Frank, Goryachev, Alex

Year:

2014

Language:

english

File:

PDF, 250 KB

english, 2014

13

[IEEE 2018 Forum on specification & Design Languages (FDL) - Garching (2018.9.10-2018.9.12)] 2018 Forum on Specification & Design Languages (FDL) - Extensible and Configurable RISC-V Based Virtual Prototype

Herdt, Vladimir, GroBe, Daniel, Le, Hoang M., Drechsler, Rolf

Year:

2018

Language:

english

File:

PDF, 234 KB

english, 2018

14

[IEEE 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Florence, Italy (2019.3.25-2019.3.29)] 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) - One Method - All Error-Metrics: A Three-Stage Approach for Error-Metric Evaluation in Approximate Computing

Froehlich, Saman, Grose, Daniel, Drechsler, Rolf

Year:

2019

Language:

english

File:

PDF, 121 KB

english, 2019

15

[IEEE 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Florence, Italy (2019.3.25-2019.3.29)] 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Accuracy and Compactness in Decision Diagrams for Quantum Computation

Zulehner, Alwin, Niemann, Philipp, Drechsler, Rolf, Wille, Robert

Year:

2019

Language:

english

File:

PDF, 125 KB

english, 2019

16

[IEEE 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Miami, FL, USA (2019.7.15-2019.7.17)] 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Ignore Clocking Constraints: An Alternative Physical Design Methodology for Field-Coupled Nanotechnologies

Wille, Robert, Walter, Marcel, Sill Torres, Frank, GroBe, Daniel, Drechsler, Rolf

Year:

2019

Language:

english

File:

PDF, 387 KB

english, 2019

17

Automated Analysis of Virtual Prototypes at the Electronic System Level (Design Understanding and Applications) ||

Goli, Mehran, Drechsler, Rolf

Year:

2020

File:

PDF, 6.13 MB

2020

18

[IEEE 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Grenoble, France (2020.3.9-2020.3.13)] 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Fast and Accurate Performance Evaluation for RISC-V using Virtual Prototypes *

Herdt, Vladimir, Grose, Daniel, Drechsler, Rolf

Year:

2020

File:

PDF, 273 KB

2020

19

ACTion: Combining logic synthesis and technology mapping for MUX-based FPGAs

Wolfgang Günther, Rolf Drechsler

Journal:

Journal of Systems Architecture

Year:

2000

Language:

english

File:

PDF, 216 KB

english, 2000

20

Synthesis of quantum circuits for linear nearest neighbor architectures

Mehdi Saeedi, Robert Wille, Rolf Drechsler

Journal:

Quantum Information Processing

Year:

2011

Language:

english

File:

PDF, 641 KB

english, 2011

21

On the Expressive Power of OKFDDs

Bernd Becker, Rolf Drechsler, Michael Theobald

Journal:

Formal Methods in System Design

Year:

1997

Language:

english

File:

PDF, 369 KB

english, 1997

22

Heuristic Learning Based on Genetic Programming

Frank Schmiedle, Nicole Drechsler, Daniel Große, Rolf Drechsler

Journal:

Genetic Programming and Evolvable Machines

Year:

2002

Language:

english

File:

PDF, 213 KB

english, 2002

23

Towards a Design Flow for Reversible Logic || Synthesis of Reversible Logic

Wille, Robert, Drechsler, Rolf

Year:

2010

Language:

english

File:

PDF, 870 KB

english, 2010

24

[Lecture Notes in Computer Science] Applications of Evolutionary Computing Volume 3005 || Multi-swarm Optimization in Dynamic Environments

Raidl, Günther R., Cagnoni, Stefano, Branke, Jürgen, Corne, David Wolfe, Drechsler, Rolf, Jin, Yaochu, Johnson, Colin G., Machado, Penousal, Marchiori, Elena, Rothlauf, Franz, Smith, George D., Squill

Year:

2004

Language:

english

File:

PDF, 215 KB

english, 2004

25

[Lecture Notes in Computer Science] Applications of Evolutionary Computation Volume 7248 || A GA Combining Technical and Fundamental Analysis for Trading the Stock Market

Di Chio, Cecilia, Agapitos, Alexandros, Cagnoni, Stefano, Cotta, Carlos, de Vega, Francisco Fernández, Di Caro, Gianni A., Drechsler, Rolf, Ekárt, Anikó, Esparcia-Alcázar, Anna I., Farooq, Muddassar,

Year:

2012

Language:

english

File:

PDF, 200 KB

english, 2012

26

Considering nearest neighbor constraints of quantum circuits at the reversible circuit level

Wille, Robert, Lye, Aaron, Drechsler, Rolf

Journal:

Quantum Information Processing

Year:

2014

Language:

english

File:

PDF, 431 KB

english, 2014

27

Trading off circuit lines and gate costs in the synthesis of reversible logic

Wille, Robert, Soeken, Mathias, Michael Miller, D., Drechsler, Rolf

Journal:

Integration, the VLSI Journal

Year:

2014

Language:

english

File:

PDF, 1.03 MB

english, 2014

28

Introduction to the Special Issue on Reversible Computation

Wille, Robert, Drechsler, Rolf, Tahoori, Mehdi B.

Journal:

ACM Journal on Emerging Technologies in Computing Systems

Year:

2014

Language:

english

File:

PDF, 29 KB

english, 2014

29

[IEEE 2007 IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (2007.05.27-2007.05.30)] 2007 IEEE International Symposium on Circuits and Systems - Visualization of SystemC Designs

Genz, Christian, Drechsler, Rolf, Angst, Gerhard, Linhard, Lothar

Year:

2007

Language:

english

File:

PDF, 602 KB

english, 2007

30

[IEEE 2011 IEEE 41st International Symposium on Multiple-Valued Logic (ISMVL) - Tuusula, Finland (2011.05.23-2011.05.25)] 2011 41st IEEE International Symposium on Multiple-Valued Logic - From Truth Tables to Programming Languages: Progress in the Design of Reversible Circuits

Drechsler, Rolf, Wille, Robert

Year:

2011

Language:

english

File:

PDF, 411 KB

english, 2011

31

[IEEE 2009 IEEE International Symposium on Circuits and Systems - ISCAS 2009 - Taipei, Taiwan (2009.05.24-2009.05.27)] 2009 IEEE International Symposium on Circuits and Systems - Approximate BDD Minimization by Weighted A.

Ebendt, Rudiger, Drechsler, Rolf

Year:

2009

Language:

english

File:

PDF, 620 KB

english, 2009

32

[IEEE 2008 IEEE International Symposium on Circuits and Systems - ISCAS 2008 - Seattle, WA, USA (2008.05.18-2008.05.21)] 2008 IEEE International Symposium on Circuits and Systems - Process variations aware robust on-chip bus architecture synthesis for MPSoCs

Pandey, Sujan, Drechsler, Rolf, Murgan, Tudor, Glesner, Manfred

Year:

2008

Language:

english

File:

PDF, 143 KB

english, 2008

33

[IEEE 2010 IEEE International Symposium on Circuits and Systems - ISCAS 2010 - Paris, France (2010.05.30-2010.06.2)] Proceedings of 2010 IEEE International Symposium on Circuits and Systems - Using QBF to increase accuracy of SAT-based debugging

Sulflow, Andre, Fey, Gorschwin, Drechsler, Rolf

Year:

2010

Language:

english

File:

PDF, 207 KB

english, 2010

34

[ACM Press the The 51st Annual Design Automation Conference - San Francisco, CA, USA (2014.06.01-2014.06.05)] Proceedings of the The 51st Annual Design Automation Conference on Design Automation Conference - DAC '14 - Exact One-pass Synthesis of Digital Microfluidic Biochips

Keszocze, Oliver, Wille, Robert, Ho, Tsung-Yi, Drechsler, Rolf

Year:

2014

Language:

english

File:

PDF, 413 KB

english, 2014

35

[ACM Press the 21st edition of the great lakes symposium - Lausanne, Switzerland (2011.05.02-2011.05.04)] Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '11 - Simulation-based equivalence checking between SystemC models at different levels of abstraction

Große, Daniel, Groß, Markus, Kühne, Ulrich, Drechsler, Rolf

Year:

2011

Language:

english

File:

PDF, 421 KB

english, 2011

36

[Lecture Notes in Computer Science] Applications of Evolutionary Computing Volume 3005 || Competitive Goal Coordination in Automatic Parking

Raidl, Günther R., Cagnoni, Stefano, Branke, Jürgen, Corne, David Wolfe, Drechsler, Rolf, Jin, Yaochu, Johnson, Colin G., Machado, Penousal, Marchiori, Elena, Rothlauf, Franz, Smith, George D., Squill

Year:

2004

Language:

english

File:

PDF, 187 KB

english, 2004

37

[Lecture Notes in Electrical Engineering] Languages, Design Methods, and Tools for Electronic System Design Volume 385 || Enabler-Based Synchronizer Model for Clock Domain Crossing Static Verification

Drechsler, Rolf, Wille, Robert

Year:

2016

Language:

english

File:

PDF, 1.35 MB

english, 2016

38

[IEEE 2015 Formal Methods in Computer-Aided Design (FMCAD) - Austin, TX, USA (2015.9.27-2015.9.30)] 2015 Formal Methods in Computer-Aided Design (FMCAD) - Simulation graphs for reverse engineering

Soeken, Mathias, Sterin, Baruch, Drechsler, Rolf, Brayton, Robert

Year:

2015

Language:

english

File:

PDF, 1.27 MB

english, 2015

39

[IEEE 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC) - Chiba, Japan (2017.1.16-2017.1.19)] 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC) - Exact routing for micro-electrode-dot-array digital microfluidic biochips

Keszocze, Oliver, Li, Zipeng, Grimmer, Andreas, Wille, Robert, Chakrabarty, Krishnendu, Drechsler, Rolf

Year:

2017

Language:

english

File:

PDF, 279 KB

english, 2017

40

Synthesis of optical circuits using binary decision diagrams

Deb, Arighna, Wille, Robert, Keszöcze, Oliver, Shirinzadeh, Saeideh, Drechsler, Rolf

Journal:

Integration, the VLSI Journal

Year:

2017

Language:

english

File:

PDF, 672 KB

english, 2017

41

Synthesis of circuits based on all-optical Mach-Zehnder Interferometers using Binary Decision Diagrams

Bandyopadhyay, Chandan, Das, Rakesh, Wille, Robert, Drechsler, Rolf, Rahaman, Hafizur

Journal:

Microelectronics Journal

Year:

2018

Language:

english

File:

PDF, 2.96 MB

english, 2018

42

Frame conditions in the automatic validation and verification of UML/OCL models: A symbolic formulation of modifies only statements

Przigoda, Nils, Niemann, Philipp, Filho, Jonas Gomes, Wille, Robert, Drechsler, Rolf

Journal:

Computer Languages, Systems & Structures

Year:

2017

Language:

english

File:

PDF, 1.94 MB

english, 2017

43

Verifying the structure and behavior in UML/OCL models using satisfiability solvers

Przigoda, Nils, Soeken, Mathias, Wille, Robert, Drechsler, Rolf

Journal:

IET Cyber-Physical Systems: Theory & Applications

Year:

2016

Language:

english

File:

PDF, 689 KB

english, 2016

44

[IEEE 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC) - Jeju, Korea (South) (2018.1.22-2018.1.25)] 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC) - Approximation-aware testing for approximate circuits

Chandrasekharan, Arun, Eggersglus, Stephan, Grose, Daniel, Drechsler, Rolf

Year:

2018

Language:

english

File:

PDF, 192 KB

english, 2018

45

[IEEE 2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Cambridge (2017.10.23-2017.10.25)] 2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) - Unintrusive aging analysis based on offline learning

Torres, Frank Sill, Rodrigues Leite, Pedro Fausto, Drechsler, Rolf

Year:

2017

Language:

english

File:

PDF, 410 KB

english, 2017

46

[IEEE Conference Publications Design Automation and Test in Europe - Dresden, Germany (2014.03.24-2014.03.28)] Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014 - Panel: Future SoC verification methodology: UVM evolution or revolution?

Drechsler, Rolf, Chevallaz, Christophe, Fummi, Franco, Hu, Alan J., Morad, Ronny, Schirrmeister, Frank, Goryachev, Alex

Year:

2014

Language:

english

File:

PDF, 250 KB

english, 2014

47

[IEEE 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Dresden, Germany (2018.3.19-2018.3.23)] 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Towards fully automated TLM-to-RTL property refinement

Herdt, Vladimir, Le, Hoang M., Grose, Daniel, Drechsler, Rolf

Year:

2018

Language:

english

File:

PDF, 149 KB

english, 2018

48

[IEEE 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Hong Kong (2018.7.8-2018.7.11)] 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Logic Synthesis for In-memory Computing Using Resistive Memories

Shirinzadeh, Saeideh, Drechsler, Rolf

Year:

2018

Language:

english

File:

PDF, 185 KB

english, 2018

49

[IEEE 2019 IEEE International Symposium on Circuits and Systems (ISCAS) - Sapporo, Japan (2019.5.26-2019.5.29)] 2019 IEEE International Symposium on Circuits and Systems (ISCAS) - HotAging — Impact of Power Dissipation on Hardware Degradation

Torres, Frank Sill, Ortiz, Alberto Garcia, Drechsler, Rolf

Year:

2019

Language:

english

File:

PDF, 712 KB

english, 2019

50

Advanced Boolean Techniques (Selected Papers from the 13th International Workshop on Boolean Problems) || Improving SAT Solving Using Monte Carlo Tree Search-Based Clause Learning

Drechsler, Rolf, Soeken, Mathias

Year:

2020

Language:

english

File:

PDF, 1.05 MB

english, 2020